Performance Analysis and Verification of SoC Interconnects
In the world of the System on Chip (SoC) end users have come to expect a richer web experience, full HD video, full HD gaming and sophisticated applications leading to embedded processors becoming more powerful; wired and wireless communications becoming faster; and graphics and audio becoming more capable. As a result, the role of the interconnect that connects all these data producers and consumers together is becoming more demanding. To meet the increased demands, new protocols (AXI4TM, ACETM, ACE-LiteTM), new Corelink™ NIC-400™ Interconnect, with new features such as Quality of Service (QoS-400™), QoS Virtual Networks (QVN-400™), and Memory Management Units are being added to the interconnect. All of these have to be thoroughly understood to get the best performance out of your SoC.
To read the full article, click here
Related Semiconductor IP
- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
- 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm
- 1.8V to 5V GPIO, 1.8V to 5V Analog in TSMC 180nm BCD
- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- Specialed 20V Analog I/O in TSMC 55nm
Related Blogs
- AI-Based Sequence Detection for IP and SoC Verification & Validation
- Verification of Integrity and Data Encryption (IDE) for CXL Devices
- Ultra Ethernet Consortium Set to Enable Scaling of Networking Interconnects for AI and HPC
- T&VS delivers Emulation and Validation services for Mobile SoC
Latest Blogs
- Cadence Unveils the Industry’s First eUSB2V2 IP Solutions
- Half of the Compute Shipped to Top Hyperscalers in 2025 will be Arm-based
- Industry's First Verification IP for Display Port Automotive Extensions (DP AE)
- IMG DXT GPU: A Game-Changer for Gaming Smartphones
- Rivos and Canonical partner to deliver scalable RISC-V solutions in Data Centers and enable an enterprise-grade Ubuntu experience across Rivos platforms