Putting the "Heterogeneous" in the HSA Foundation
In September’s article, SMP, Asymmetric Multiprocessing, and the HSA Foundation, I explained why symmetric multiprocessing (SMP) architectures have been popular in PC and server markets, and why heterogeneous or asymmetric multiprocessing (AMP) has been the norm in mobility and consumer electronics markets. I also explained the trends that are leading PC and server markets to adopt heterogeneous architectures and introduced the HSA Foundation’s goal of making heterogeneous core chips easy to program.
In this month’s article I will introduce the HSA Solution Stack and give a longer-term vision of how HSA can scale beyond CPU-GPU computing. (Hint: The hardware/SoC interconnect fabric is a critical ingredient in this!)
To read the full article, click here
Related Semiconductor IP
- SPI Controller IP- Slave-only, Parameterized FIFO, AMBA APB / AHB / AXI Bus
- I2C Controller IP – Slave, Parameterized FIFO, Avalon Bus
- I2C Controller IP – Master, Parameterized FIFO, Avalon Bus
- I2C/SMBus Controller IP – Master / Slave, Parameterized FIFO, AXI/AHB/APB/Avalon Buses, SMBus Protocol
- I2C Controller IP- Master / Slave, Parameterized FIFO, Avalon Bus
Related Blogs
- SMP, Asymmetric Multiprocessing, and the HSA Foundation
- Moore's Law Continues, but Needs Help from Heterogeneous Computing
- IP Quality: Foundation of a Successful Ecosystem
- Asymmetric Multiprocessing with Heterogeneous Architectures: Use the Best Core for the Job