FPGA Debug Is Harder Than You Think
August 5, 2010
As FPGAs become more and more complex, new design challenges creep into the development process. These can be caused by the use of unfamiliar tools, new IP cores, or just the size and complexity of the device you are designing.
We’ve documented some of the most common problems designers run into. Here are a few that we think you’ll find useful along with links to more detailed articles.
There are many affects from tools that are down stream from the simulator. Errors that creep in from these tools create issues with the design in the FPGA that are very difficult to find.
To read the full article, click here
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