A Strategy To Verify An AXI ACE Compliant Interconnect - Part 2 of 4
In the last post of the series I focused on the first level of testing required for verifying an AXI ACE Compliant Interconnect. In that post, I focused on Integration/Connectivity testing. In this post I will focus on basic ‘coherent transaction’ testing. I use the term ‘basic’ to signify something that is a prerequisite before we move on to more advanced testing. ‘Coherent transactions’ are a set of transactions used in the AXI ACE protocol to perform load and store operations. Each of these transactions have a different set of response requirements from the Interconnect. Further, each of these transactions can be used in multiple configurations. We need to verify that the Interconnect works correctly for each of these transaction types. I will first give an overview of the protocol before moving on to a testing strategy for these.
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Related Semiconductor IP
- Temperature Glitch Detector
- Clock Attack Monitor
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
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Related Blogs
- A Strategy to Verify an AXI ACE Compliant Interconnect - Part 3 of 4
- A Strategy to Verify an AXI/ACE Compliant Interconnect (2 of 4)
- RISC-V: An Open Standard - Backed by a Global Community - to Enable Open Computing for All
- Jumping the Barrier of Verifying AMBA ACE Barrier Transactions