USB 3.0 IP

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Compare 117 USB 3.0 IP from 23 vendors (1 - 10)
  • MIPI M-PHY - TSMC 40nm
    • Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
    • •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
    • •Supports M-PHY Type-I system
    • •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
    Block Diagram -- MIPI M-PHY - TSMC 40nm
  • Block Diagram -- A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell
  • MIPI M-PHY Designed For GF 28nm
    • •Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
    • •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
    • •Supports M-PHY Type-I system
    • •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
    Block Diagram -- MIPI M-PHY Designed For GF 28nm
  • USB 3.0 SSIC PHY
    • Compliant with SSIC specification 1.0
    • Compliant with MIPI-MPHY (Type-1) specification Rev 3.0-r.03
    Block Diagram -- USB 3.0 SSIC PHY
  • USB HSIC PHY - High Speed Inter-Chip IP Core
    • High-Speed 480Mbps data rate only
    • Source-synchronous seriel interface
    • No power consumed unless a transfer is in progress.
    • Maximum trace length of 10cm
    Block Diagram -- USB HSIC PHY - High Speed Inter-Chip IP Core
  • USB 3.0 Device Controller
    • USB 3.0 Compliance
    • 8/16/32 bit USB 3.0 PIPE interface
    • 8/16 UTMI/ULPI interface
    • Master DMA implementation for each endpoint with Scatter Gather support
    Block Diagram -- USB 3.0 Device Controller
  • USB3.0 build-in clock PHY, SMIC 110g
    • Smallest USB 3.2 Gen1x1 BCK PHY IP worldwide (e.g. IP size @40nm <0.36mm²)
    • Fully compliant with Universal Serial Bus USB 3.2 Gen1x1, 2.0, and 1.1 electrical specifications
    • Supports clock outputs from the internal BCK module
    • Real-time calibrations to ensure frequency accuracy
    Block Diagram -- USB3.0 build-in clock PHY, SMIC 110g
  • USB3.0 build-in clock PHY, SMIC 55LL
    • Smallest USB 3.2 Gen1x1 BCK PHY IP worldwide (e.g. IP size @40nm <0.36mm²)
    • Fully compliant with Universal Serial Bus USB 3.2 Gen1x1, 2.0, and 1.1 electrical specifications
    • Supports clock outputs from the internal BCK module
    • Real-time calibrations to ensure frequency accuracy
    Block Diagram -- USB3.0 build-in clock PHY, SMIC 55LL
  • USB3.0 build-in clock PHY, SMIC 40LP, type-C
    • Smallest USB 3.2 Gen1x1 BCK PHY IP worldwide (e.g. IP size @40nm <0.36mm²)
    • Fully compliant with Universal Serial Bus USB 3.2 Gen1x1, 2.0, and 1.1 electrical specifications
    • Supports clock outputs from the internal BCK module
    • Real-time calibrations to ensure frequency accuracy
    Block Diagram -- USB3.0 build-in clock PHY, SMIC 40LP, type-C
  • USB3.0 build-in clock PHY, HLMC 40LP, type-C
    • Smallest USB 3.2 Gen1x1 BCK PHY IP worldwide (e.g. IP size @40nm <0.36mm²)
    • Fully compliant with Universal Serial Bus USB 3.2 Gen1x1, 2.0, and 1.1 electrical specifications
    • Supports clock outputs from the internal BCK module
    • Real-time calibrations to ensure frequency accuracy
    Block Diagram -- USB3.0 build-in clock PHY, HLMC 40LP, type-C
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