USB 3.0 PHY IP

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Compare 140 USB 3.0 PHY IP from 16 vendors (1 - 10)
  • MIPI M-PHY Designed For GF 28nm
    • •Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
    • •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
    • •Supports M-PHY Type-I system
    • •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
    Block Diagram -- MIPI M-PHY Designed For GF 28nm
  • USB3.0 PHY
    • Silicon proven in 22, 28, Global Foundries and Samsung
    • Spread Spectrum clock (SSC) and data scrambling to minimize EMI
    • Supports 16-bit 250-MHz , and 32-bit 125M PIPE interface
    • Multiple loopback and compliance test modes
    Block Diagram -- USB3.0 PHY
  • USB3.0 PHY on GF22FDX and Samsung 28nm FDSOI
    • The USB3.0 PHY IP is designed according to the USB 3.0, USB2.0 Specification.
    • It supports the USB3.0 5Gbps Super-Speed mode and backward compatibles with the USB2.0 480Mbps High-Speed, 12Mbps Full-Speed, and 1.5Mbps Low-Speed modes
    • The USB 3.0 PHY interface complies with PHY Interface for PCI Express and USB3.0 Architectures specification (PIPE 3.0) and the USB2.0 PHY interface complies with the UTMI v1.05 specification.
       
    Block Diagram -- USB3.0 PHY  on GF22FDX and Samsung 28nm FDSOI
  • USB 3.0 SSIC PHY
    • Compliant with SSIC specification 1.0
    • Compliant with MIPI-MPHY (Type-1) specification Rev 3.0-r.03
    Block Diagram -- USB 3.0 SSIC PHY
  • USB HSIC PHY - High Speed Inter-Chip IP Core
    • High-Speed 480Mbps data rate only
    • Source-synchronous seriel interface
    • No power consumed unless a transfer is in progress.
    • Maximum trace length of 10cm
    Block Diagram -- USB HSIC PHY - High Speed Inter-Chip IP Core
  • USB-C 3.0 femtoPHY, Type-C - TSMC 28HPC, North/South Poly Orientation
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB-C 3.0 femtoPHY, Type-C - TSMC 28HPC, North/South Poly Orientation
  • USB-C 3.0 femtoPHY, Type-C - TSMC 16FFC, North/South Poly Orientation
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB-C 3.0 femtoPHY, Type-C - TSMC 16FFC, North/South Poly Orientation
  • USB-C 3.0 femtoPHY, Type-C - TSMC 16FF+LL, North/South Poly Orientation
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB-C 3.0 femtoPHY, Type-C - TSMC 16FF+LL, North/South Poly Orientation
  • USB-C 3.0 femtoPHY, Type-C - TSMC 12FFC, North/South Poly Orientation
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB-C 3.0 femtoPHY, Type-C - TSMC 12FFC, North/South Poly Orientation
  • USB 3.0 SSPHY, GF22FDSOI x1, North/South (vertical) poly orientation
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 SSPHY, GF22FDSOI x1, North/South (vertical) poly orientation
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