USB IP
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535
USB IP
from 48 vendors
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USB 2.0 PHY GlobalFoundaries 12nm, 22nm, 28nm, 40nm
- Complies with USB specifications Rev. 2.0 and 1.1
- Complies with UTMI+ specification Level 3, Rev. 1.0
- Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
- Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
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USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
- Complies with USB specifications Rev. 2.0 and 1.1
- Complies with UTMI+ specification Level 3, Rev. 1.0
- Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
- Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
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Complete USB Type-C Power Delivery PHY, RTL, and Software
- USB PD 3.1 compliant.
- 8 bit register interface for a low speed processor, or optional I2C interface.
- Integrated Chapter 6 protocol reduces required MPU response time to 10mS.
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PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface
- Designed to the USB4 Specification v1.0
- Follows PCIe 1.0 protocol, but can operate at any compatible speed
- Supports the PCI-SIG Single-Root I/O Virtualization (SR-IOV) Specification
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PCIe Controller for USB4 Hosts and Devices, supporting PCIe Tunneling
- Designed to the USB4 Specification v1.0
- Follows PCIe 1.0 protocol, but can operate at any compatible speed
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PCIe Switch for USB4 Hubs, Hosts and Devices
- PCI Express Interfaces (upstream and downstream ports)
- Switching Logic
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USB 2.0 PHY IP, Silicon Proven in TSMC 22ULP
- Compliant with USB2.0 and USB1.1 specification
- Compliant with UTMI Specification Version level 3.
- Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
- All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
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USB 2.0 OTG High / Full / Low- Speed Dual Role IP Core
- Support SW controlled host/device role switching.
- Support Fullspeed and Lowspeed
- Support Control, Bulk, Interrupt and Isochronous Transfer Types
- Support L1/L2 power saving modes for USB 2.0 port
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MIPI M-PHY - TSMC 40nm
- Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
- •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
- •Supports M-PHY Type-I system
- •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
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USB 2.0 PHY
- Complies with USB specifications, rev. 2.0 and 1.1
- Complies with UTMI+ specification, level 3, rev. 1.0
- Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
- Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
