LPDDR2 Controller IP

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Compare 7 LPDDR2 Controller IP from 1 vendors (1 - 7)

LPDDR2 Synthesizable Transactor
- Supports 100% of LPDDR2 protocol standard JESD209-2E and JESD209-2F
- Supports all the LPDDR2 commands as per the specs
- Supports up to 32GB device density
- Supports following devices:
LPDDR2 DFI Verification IP
- Compliant with DFI version 2.1 or higher Specifications.
- Supports LPDDR2 devices compliant with JEDEC LPDDR2 SDRAM Standard JESD209-2F.pdf and JESD209-2E.pdf
- Supports for Read data-eye training
- Supports for Read gate training
LPDDR2 Controller IIP
- Supports LPDDR2 protocol standard JESD209-2E and JESD209-2F Specification
- Compliant with DFI version 2.1 or higher Specification.
- Supports up to 16 AXI ports with data width upto 512 bits.
- Supports controllable outstanding transactions for AXI write and read channels
LPDDR Controller IIP
- Supports LPDDR protocol standard and JESD209A-1 and JESD209B Specification
- Compliant with DFI version 2.0 or higher Specification.
- Supports up to 16 AXI ports with data width upto 512 bits.
- Supports controllable outstanding transcations for AXI write and read channels
LPDDR DFI Assertion IP
- Specification Compliance
- Compliant with DFI version 2.0 or higher Specifications.
- Supports LPDDR devices compliant with JEDEC LPDDR SDRAM Standard JESD209A-1.pdf and JESD209B.pdf.
- Supports all Interface Groups.
LPDDR2 Assertion IP
- Specification Compliance
- Supports LPDDR2 memory devices from all leading vendors.
- Supports 100% of LPDDR2 protocol standard JESD209-2E and JESD209-2F.
- Supports all the LPDDR2 commands as per the specs.
LPDDR2 DFI Assertion IP
- Specification Compliance
- Compliant with DFI version 2.1 or higher Specifications.
- Supports LPDDR2 devices compliant with JEDEC LPDDR2 SDRAM Standard JESD209-2F.pdf and JESD209-2E.pdf.
- Supports for Read data-eye training.