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USB On-The-Go PHY IP

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Compare 49 USB On-The-Go PHY IP from 6 vendors (1 - 10)
  • USB 2.0 PHY For On-The-Go Controller
    • Complies with USB specifications, rev. 2.0 and 1.1
    • Complies with UTMI+ specification, level 3, rev. 1.0
    • Supports OTG USB 2.0
    • Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
    Block Diagram -- USB 2.0 PHY For On-The-Go Controller
  • USB 2.0 On-The-Go Controller
    • High speed support: 480 Mbit/s
    • Full speed support: 12 Mbit/s
    • USB 2.0 Compliant
    • High/Full speed support using 8/16 bit UTMI/ULPI interface
    Block Diagram -- USB 2.0 On-The-Go Controller
  • USB 2.0 PHY IP, Silicon Proven in UMC 40LP
    • Compliant with USB2.0 and USB1.1 specification
    • Compliant with UTMI Specification Version level 3.
    • Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
    • All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
    Block Diagram -- USB 2.0 PHY IP, Silicon Proven in UMC 40LP
  • USB 3.0 PHY IP, Silicon Proven in UMC 40SP
    • Compliant with Universal Serial Bus 3.0 Specification
    • Supports 2.5GT/s and 5.0GT/s serial data transmission rate
    • Compliant with PIPE 3.0
    • Compliant with Universal Serial Bus 2.0 Specification
    Block Diagram -- USB 3.0 PHY IP, Silicon Proven in UMC 40SP
  • USB 2.0 PHY IP, Silicon Proven in SMIC 40LL
    • Compliant with USB2.0 and USB1.1 specification
    • Compliant with UTMI Specification Version level 3.
    • Supports HS (480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
    • All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
    Block Diagram -- USB 2.0 PHY IP, Silicon Proven in SMIC 40LL
  • USB 2.0 PHY IP, Silicon Proven in SMIC 55LL
    • Compliant with USB2.0 and USB1.1 specification
    • Compliant with UTMI Specification Version level 3.
    • Supports HS (480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
    • All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
    Block Diagram -- USB 2.0 PHY IP, Silicon Proven in SMIC 55LL
  • USB 3.0 PHY IP, Silicon Proven in TSMC 28HPC+
    • Compliant with Universal Serial Bus 3.0 Specification
    • Supports 2.5GT/s and 5.0GT/s serial data transmission rate
    • Compliant with PIPE 3.0
    • Compliant with Universal Serial Bus 2.0 Specification
    Block Diagram -- USB 3.0 PHY IP, Silicon Proven in TSMC 28HPC+
  • USB 2.0 OTG On-The-Go Transceiver PHY
    • Fully compliant with latest USB 2.0
    • Innovative technique to recover clock from 480 Mbps data.
    • High frequency PLL.
    • Advanced High-Speed Transmitter and Receiver.
  • USB2.0 OTG PHY
    • Low cost OTG PHY
  • USB 2.0 PHY TSMC 40LPeDRAM
    • Complies with USB specifications, rev. 2.0 and 1.1
    • Complies with UTMI+ specification, level 3, rev. 1.0
    • Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
    • Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
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