MIPI SLIMbus IP

The MIPI SLIMbus controller IP cores are designed to provide MIPI SLIMbus1.01 compliant connectivity for a peripheral device. The MIPI SLIMbus® specification supports a wide range of digital audio and control solutions to seamlessly transport audio and related data for larger-sized mobile device components such as the application processor, audio codec, modem, audio digital signal processor, Bluetooth chipset and FM receiver. Multiple components can be interconnected on the same link to lower overall system costs and facilitate flexible designs.

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Compare 5 MIPI SLIMbus IP from 3 vendors (1 - 5)

MIPI SLIMbus Device Controller V2.0
- Compliant with MIPI SLIMbus Specification version 1.01
- Contains full-featured active interface device, with support for
- Contains one generic device with up to 8 active port pairs; each port supports
MIPI SLIMbus Host Controller v2.0
- Compliant with MIPI SLIMbus Specification version 2.0
- Contains full-featured active manager and interface devices
Simulation VIP for MIPI SLIMbus
- Segment distribution
- SLIMbus v2.0: Supports all segment distribution codes.
- Multichannel stream
- SLIMbus v2.0: Supports data carrying on multiple channels that have the same direction and sample rate and that are phase-aligned.
MIPI SLIMBUS Verification IP
- Supports 1.01.01/2.0 MIPI SLIMbus Specification.
- Supports Organized TDM frame structure allows SLIMbus to carry Control and Data information.
- Supports unidirectional CLK line.
- Supports up to 8 bi-directional data line.
MIPI SLIMBUS Synthesizable Transactor
- Supports 1.01.01/2.0 MIPI SLIMbus Specification
- Supports organized TDM frame structure which allows SLIMbus to carry Control and Data information
- Supports unidirectional CLK line
- Supports up to eight bi-directional DATA line