MIPI IP for SMIC
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49
MIPI IP
for SMIC
from 7 vendors
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10)
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MIPI DPHY v1.2 Tx 4 Lanes - SMIC 28PS 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v1.2
- Fully integrated hard macro
- Up to 2.5 Gbps per lane
- Aggregate throughput up to 10 Gbps in 4 data lanes
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MIPI DPHY v1.2 Rx 4 Lanes - SMIC 28PS 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v1.2
- Fully integrated hard macro
- Up to 2.5 Gbps per lane
- Aggregate throughput up to 10 Gbps in 4 data lanes
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MIPI DPHY Gen2 Bidirectional 4 Lanes - SMIC 28HKMG 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v1.2
- Fully integrated hard macro
- Up to 2.5 Gbps per lane
- Aggregate throughput up to 10 Gbps in 4 data lanes
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MIPI DPHY
- Silicon proven in 22, 28, 55, 110nm from Global Foundries, Samsung and SMIC
- Compliant to the MIPI D-PHY spec v1.1 (SEC28/SMIC55/SMIC110)
- Lane type:1 clock + 4 data, bi-directional
- Built-in self test function
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MIPI DPHY-RX
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Data rate per lane: High-Speed mode 80M~2.5G bps, Low-Power mode 10Mbps
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Silicon proven in GlobalFoundries 22FDX process
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Compliant to the MIPI D-PHY spec v1.2
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Lane type:1 clock + 4 data(D0 is bi-dir)
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Support for DPHY Ultra Low Power State
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MIPI DPHY-TX - GlobalFoundries 22FDX process
- Data rate per lane: High-Speed mode 80M~2.5G bps, Low-Power mode 10Mbps
- Silicon proven in GlobalFoundries 22FDX process
- Compliant to the MIPI D-PHY spec v1.2
- Support HiSPi-SLVS TX compatible mode
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MIPI M-PHY in SMIC 90LL
- Supports MIPI Standard for M-PHY v3.0.
- Dual-simplex point-to-point interface with ultra low voltage differential signaling
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MIPI D-PHY DSI RX (Receiver) in SMIC 130nm
- SMIC 130nm
- Consists of 1 Clock lane and 4 Data lanes
- Supporting the MIPI Standard 1.1 for D-PHY
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MIPI M-PHY in SMIC 130nm
- Complies with MIPI Standard for M-PHY v3.0
- Slew-rate control for EMI reduction
- Supports HS modes GEAR 1-3
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MIPI M-PHY Compliant (HS-G2) IP
- Complies with MIPI Standard for M-PHY, Draft Specification v0.90.
- Dual-simplex point-to-point interface with ultra low voltage differential signaling
- Slew-rate control for EMI reduction
- Supports all HS modes (GEAR 1-2)
