USB 3.0 PHY IP for Samsung

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Compare 8 USB 3.0 PHY IP for Samsung from 3 vendors (1 - 8)
  • USB3.0 PHY
    • Silicon proven in 22, 28, Global Foundries and Samsung
    • Spread Spectrum clock (SSC) and data scrambling to minimize EMI
    • Supports 16-bit 250-MHz , and 32-bit 125M PIPE interface
    • Multiple loopback and compliance test modes
    Block Diagram -- USB3.0 PHY
  • USB3.0 PHY on GF22FDX and Samsung 28nm FDSOI
    • The USB3.0 PHY IP is designed according to the USB 3.0, USB2.0 Specification.
    • It supports the USB3.0 5Gbps Super-Speed mode and backward compatibles with the USB2.0 480Mbps High-Speed, 12Mbps Full-Speed, and 1.5Mbps Low-Speed modes
    • The USB 3.0 PHY interface complies with PHY Interface for PCI Express and USB3.0 Architectures specification (PIPE 3.0) and the USB2.0 PHY interface complies with the UTMI v1.05 specification.
       
    Block Diagram -- USB3.0 PHY  on GF22FDX and Samsung 28nm FDSOI
  • USB 3.0 PHY in Samsung (28nm, 14nm)
    • Complete mixed-signal physical layer for USB 3.0 applications
    • Includes all circuitry needed for operation at all USB speeds (SuperSpeed, High-Speed, FullSpeed, Low-Speed)
    • USB-C 3.0 femtoPHY supports Type-C reversible connectors
    • Optimized PHY area (<0.5mm2 for USB 3.0, <0.8mm2 for USB-C 3.0)
  • USB 3.0 femtoPHY in Samsung (14nm, 11nm, 10nm)
    • Complete mixed-signal physical layer for USB 3.0 applications
    • Includes all circuitry needed for operation at all USB speeds (SuperSpeed, High-Speed, FullSpeed, Low-Speed)
    • USB-C 3.0 femtoPHY supports Type-C reversible connectors
    • Optimized PHY area (<0.5mm2 for USB 3.0, <0.8mm2 for USB-C 3.0)
  • Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY
    • USB3.0 Super-Speed: Universal Serial Bus 3.0 Specification, Revision 1.0
    • PCI Express: PCI Express Base Specification, Revision 2.0
  • PCIe 3.0/3.1/USB3.0/SATA3 Combo PHY
    • Standard PHY interface enables multiple IP sources for PCI Express Logical Layer and provides a target interface for PCI Express PHY vendors.
    • Supports 2.5Gb/s only or 2.5Gb/s,5.0Gb/s and 8.0Gb/s serial data transmission rate
    • Utilizes 8-bit, 16-bit or 32- bit parallel interface to transmit and receive PCI Express data
    • Allows integration of high speed components into a single functional block as seen by the endpoint device designer.
  • Samsung 28nm FDSOI USB3.0 Type-C PHY
    • 5-Gbps Super-Speed data transmission rate through 3-m USB3.0 cable
    • Spread Spectrum clock (SSC) and data scrambling to minimize EMI
    • PIPE 3-compliant Super-Speed USB 3.0 Transceiver interface
    • Supports 16-bit 250-MHz , and 32-bit 125M PIPE interface
  • GLOBALFOUNDRIES 22nm FDSOI USB3.0 PHY
    • 5-Gbps Super-Speed data transmission rate through 3-m USB3.0 cable
    • Spread Spectrum clock (SSC) and data scrambling to minimize EMI
    • PIPE 3-compliant Super-Speed USB 3.0 Transceiver interface
    • Supports 16-bit 250-MHz , and 32-bit 125M PIPE interface
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