I2C IP for GLOBALFOUNDRIES
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I2C IP
for GLOBALFOUNDRIES
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18
I2C IP
for GLOBALFOUNDRIES
from 3 vendors
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10)
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High voltage tolerant I/O
- Scalable robustness
- Area efficient
- low capacitance option
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1.8V/3.3V I2C in GF (12nm)
- Input Schmitt trigger
- Compliance with I2C-bus specification and User Manual–April4, 2014, with I2C operating modes
- Filter of 50 ns for Spike rejection
- Automotive G1/G2 supported, ASIL-B certified
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1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (12nm)
- Input Schmitt trigger
- Compliance with I2C-bus specification and User Manual–April4, 2014, with I2C operating modes
- Filter of 50 ns for Spike rejection
- Automotive G1/G2 supported, ASIL-B certified
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IO I2C 3.3V in GF (22nm)
- Input Schmitt trigger
- Compliance with I2C-bus specification and User Manual–April4, 2014, with I2C operating modes
- Filter of 50 ns for Spike rejection
- Automotive G1/G2 supported, ASIL-B certified
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1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (22nm)
- Input Schmitt trigger
- Compliance with I2C-bus specification and User Manual–April4, 2014, with I2C operating modes
- Filter of 50 ns for Spike rejection
- Automotive G1/G2 supported, ASIL-B certified
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IO 3.3V LVDS Rx Automotive Grade 2 in GF (12nm)
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)
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IO 1.8V LVDS Rx in GF (12nm)
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)
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IO 3.3V LVDS Rx in GF (12nm)
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)
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IO 1.8V LVDS Automotive Grade 1 GF (22nm)
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)
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IO 1.8V LVDS in GF (22nm)
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)