SMIC 130nm LL Standard digital, analog and oscillator IO
Key Features
- Standard digital, analog and oscillator IO;
- Cell Size (Width * height) 35um * 211um with DUP stagger bonding pads;
- Work voltage: 3.3V power with 5V input tolerance;
- SMIC 0.13?m SMIC Logic Salicide 1.5V/3.3V Low Leakage Process;
- SMIC 0.13?m e-flash (pFlash) Salicide 1.5V/3.3V/5V Low Leakage Process;
- Suitable for 6, 7 and 8 layers application;
Technical Specifications
Foundry, Node
SMIC 130nm LL
Maturity
Silicon Proven
SMIC
Silicon Proven:
130nm
LL
Related IPs
- CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.
- Wirebond Digital and Analog Library in TSMC 65nm
- SMIC 0.18um 1.8v RC Oscillator
- SMIC 65nm LL 3.3V-2.5/1.2V Power Regulator
- NFC Semiconductor IP - Combo (digital & analog)
- Single Wire Protocol (SWP) slave digital controller compliant with the ETSI 102.613 standard