How to solve the "Too Much Semiconductor IP" problem? More IP!
When discussing system-on-chip (SoC) design with my semiconductor design and software development peers, the conversation eventually gets around to the problem of, “There’s just too much IP!” The feelings I hear border on exasperation at the problem of integrating IP on today’s large SoCs. Engineers who were once paid to write lines of Verilog or C code from scratch are now spending much of their time tying together commercial hardware IP and the associated software. Their jobs have changed, and they’ve had to acquire new skills and new tools to be successful.
To read the full article, click here
Related Semiconductor IP
- NoC System IP
- Cloud-active NOC configuration tool for generating and simulating Coherent and Non-Coherent NoCs
- Tessent NoC Monitor
- Network-on-Chip (NoC) Interconnect IP
- Coherent Network-on-chip (NoC) IP
Related Blogs
- Do Foundries Have Too Much Power?
- How SerDes Became Key IP for Semiconductor Systems
- The semiconductor IP business: the Imagination overview
- World IP Day: A Time to Reflect on the Value of Semiconductor IP
Latest Blogs
- FiRa 3.0 Use Cases: Expanding the Future of UWB Technology
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits