SystemC TLM-2.0 Virtual Platform Direct Memory Interface (DMI) Performance Impact
One of the most interesting concepts in SystemC TLM-2.0 is the concept of Direct Memory Interface (DMI). I remember when Mentor Graphics introduced Seamless back in the mid-1990's. Many users were impressed with how fast it could run embedded software.
Of course, things have changed a lot in the last fifteen years, but many of the principles of simulation performance are still the same as what I wrote in my now ancient book published in 2004. The biggest impact has been the advancement in processor model performance based on code morphing combined with just-in-time (JIT) compilation to map the target CPU instructions into the instruction set of the host computer. Even though processor models are a lot better, the options to run faster haven't changed.
There are really only two ways to improve simulation speed:
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Related Semiconductor IP
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- I2C/SMBus Controller IP – Master / Slave, Parameterized FIFO, AXI/AHB/APB/Avalon Buses, SMBus Protocol
- I2C Controller IP- Master / Slave, Parameterized FIFO, Avalon Bus
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- Creating SystemC TLM-2.0 Peripheral Models