Heard at DAC: is IP integration the real high-level design?

By _EDN Practical Chip Design

June 21, 2010

In the continuing debate over system-level design, one seemingly important aspect of the question is often overlooked. Using a dialect of C to model an SoC at behavioral level and then synthesizing the model into RTL is not the only possible way to increase the level of abstraction at the beginning of the design process. For many design teams the most important abstraction is encapsulated IP-treating blocks of IP, often from third parties, as nearly black-box representations of functions during the design flow.

Heavy IP reuse can substantially alter the design flow, changing it from a process of successively recreating the system at decreasing levels of abstraction to a process of integrating an assembly of functions based on rather limited information about their implementation. So it is not surprising that the challenge of IP integration and its relationship to system-level design became recurring themes in the Management Day track and its concluding panel at the Design Automation Conference last week.

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