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CCIX IP Cores

Welcome to the ultimate CCIX IP hub! Explore our vast directory of CCIX IP cores

The CCIX (Cache Coherent Interconnect for Accelerators) standard was created to enable hardware accelerators and processors to maintain cache coherency across shared memory in a heterogeneous multi-processor system. It leverages PCI Express 4.0 line rates up to 16GT/s with extended speed mode to accelerate speeds up to 25GT/s for CCIX 1.0 as well as 32GT/s for CCIX 1.1.

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Compare 3 CCIX IP Cores from 2 vendors (1 - 3)
  • CCIX 1.0 Verification IP
    • Supports CCIX Base Specification revision 1.0 version 1.0
    • Support all Write, Read, Data less and Atomic transaction.
    • Supports all Request responses and Snoop responses.
    • Device and Normal memory types support.
    Block Diagram -- CCIX 1.0 Verification IP
  • CCIX 32G Premium Controller with AMBA bridge II
    • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
    • Supports all required features of the PCIe 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Choice of datapath widths (128-bit, 256-bit, or 512-bit)
    • Supports cache-coherency as defined by the CCIX standard
    Block Diagram -- CCIX 32G Premium Controller with AMBA bridge II
  • CCIX 32G Premium Controller II
    • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
    • Supports all required features of the PCIe 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Choice of datapath widths (128-bit, 256-bit, or 512-bit)
    • Supports cache-coherency as defined by the CCIX standard
    Block Diagram -- CCIX 32G Premium Controller II
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