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IPsec and TLS Engine IP for TSMC

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Compare 3 IPsec and TLS Engine IP for TSMC from 1 vendors (1 - 3)
  • Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
    • Protocol aware IPsec, SSL, TLS, DTLS, 3GPP and MACsec Packet Engine with virtualization, caches classifier and Look-Aside interface for multi-core application processors
    • 5-10 Gbps, programmable, maximum CPU offload by classifier, supports new and legacy crypto algorithms, AMBA interface
    • Supported by Driver development kit, QuickSec IPsec toolkit, Linaro ODP, DPDK, Linux Crypto
    Block Diagram -- Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
  • Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps
    • Protocol aware IPsec, SSL, TLS, DTLS, 3GPP, MACsec packet engine with classifier and in-line interface for multi-core server processors
    • 10-100 Gbps, programmable, maximum CPU offload by classifier, supports new and legacy crypto algorithms, streaming and AMBA interface
    • Supported by Driver development kit, QuickSec IPsec toolkit, Linaro ODP.
    Block Diagram -- Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps
  • Multi-Protocol Engine, Look-Aside, 1 Gbps
    • Protocol-aware IPsec/TLS packet engine with Look-Aside interface for IoT.
    • Up to 1 Gbps, lowest gate count in the industry, just 100K gates (ex AMBA interface).
    • Supported by Driver Development Kit, QuickSec IPsec toolkit, Secure Boot Toolkit.
    Block Diagram -- Multi-Protocol Engine, Look-Aside, 1 Gbps
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