Serdes IP for TSMC

Compare 10 Serdes IP for TSMC from 6 vendors (1 - 10)

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1-112Gbps Integrated Laser Driver and Optical SerDes
- Optical Optimization:
- Integrated laser driver
- RX front-end architected for optical signaling
- Non-linear DSP equalization that corrects for both static and dynamic nonlinearity components.
1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes
- High speed performance
- Low power architecture
- Sub-sampling clock multiplier
112G-VSR PAM4 SerDes PHY - PPA optimized for short reach connectivity
- 1.25Gbps to 116Gbps flexible data rates allowing simultaneous support of different protocols including Ethernet and OTN
- Power optimized for short-reach applications with configurability
- Superior bit error rate (BER) with extra performance margin beyond short-reach standard requirements
- Beachfront optimized floorplan allows north-south and east-west SoC edge placement
- Comprehensive on-chip diagnostic features make system testing and debugging quick and easy
- Enables 800Gbps networking with PHY and Controller solutions
SerDes IP
- 10dB to 35dB bump-to-bump insertion loss
- Multi-rate support for 56Gbps to 112Gbps PAM4 and NRZ
- Integrated PLL
- Robust clock distribution architecture
- Advanced mixed signal analog equalization architecture
- Fully adaptive and programmable RX equalization
- Auto-negotiation
- Link Training
112G-ULR PAM4 SerDes PHY
- Supports full-duplex 1.25Gbps to 112.5Gbps data rates
- Superior bit error rate (BER) performance across high-loss and reflective channels
- Compliant with IEEE 802.3ck and OIF standard electrical specifications
- Supports flexible SoC floorplan and IP placement and provides package substrate guideline/reference designs
56G-LR Pam4 SerDes PHY
- Supports Ethernet, FC, CPRI, and eCPRI protocols
- Compliant to IEEE 802.3ck and OIF standard electrical specifications
- Supports 56Gbps PAM4 and 28G, 10G, and sub-10Gbps NRZ data rates
- Unique firmware-controlled adaptive power design provides optimal power and performance tradeoffs and more efficient system designs based on platform requirements
- Continuous calibration and adaption provide robust performance across process, voltage, and temperature
- Supports industrial temperature range -40°C – 125°C
TSMC N7FF 25.78125Gbps Enterprise SerDes
- PMAA
- RX Adaptive Decision Feedback Equalizer (DFE)
- Programmable Continuous Time Linear Equalizer (CTLE)
- RX Variable Gain Control
32G Multi-SerDes PHY
- Reference Clock:
- Internal PLL:
- Data Transmit:
- Data Receive:
TSMC CLN7FF Lane-based 1.5 – 22.5 Gbps Enterprise Multi-Standard SerDes
- PMAA (PMA Analog)
- RX Adaptive Decision Feedback Equalizer (DFE)
- Programmable Continuous Time Linear Equalizer (CTLE)
SerDes PHY IP in TSMC (7nm, 12/16nm, 22nm, 28nm)
- Supports 1.25G to 10.3125Gbps data rates and compact die area
- Supports up to 25dB channel loss@ 5.15625GHz
- Supports RX loss-of-signal detection
- Supports X1, X2 and X4 lanes