PLL IP for TSMC

Compare 43 PLL IP for TSMC from 9 vendors (1 - 10)

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High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
Fractional-N PLL for Performance Computing in TSMC N6/N7
- Frequencies up to 4GHz
- Low jitter (< 10ps RMS)
- Small size (< 0.01 sq mm)
Core Powered FracN/SSCG PLL on TSMC CLN7FF
- Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Very fine precision: near 1 part per billion resolution
- Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
4.8GHz low jitter fractional-N, Digital PLL, TSMC N7, 0.75V, N/S orientation
- Pure core voltage design
- Compact IP size (< 0.013mm²) and low power consumption (1.1mW @ 3GHz)
- Compatible with commonly used crystal oscillator frequencies
- Good power noise immunity for period jitter (< ±15%/V)
$Block Diagram -- 4.8GHz low jitter fractional-N, Digital PLL, TSMC N7, 0.75V, N/S orientation$
14GHz Integer-N High-Speed PLL
- Type II hybrid Integer-N LC-PLL
- Quadrature clocks at 14GHz and 7GHz
- Fast locking
Analog-PLL for Spread Spectrum Clock 4.3GHz
- TSMC 7n
- Including Loop filter
Integrated Droop Response System
- Observable
- Tightly Coupled
- Process Portable
Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Process portable
- Proven (65nm to 3nm)
- Full SCAN testable
- Core voltage supply