Frac-N PLL IP for TSMC
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Frac-N PLL IP
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Frac-N PLL IP
for TSMC
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- 7nm
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Core Powered FracN/SSCG PLL on TSMC CLN7FF
- Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Very fine precision: near 1 part per billion resolution
- Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
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Integrated Droop Response System
- Observable
- Tightly Coupled
- Process Portable
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Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Process portable
- Proven (65nm to 3nm)
- Full SCAN testable
- Core voltage supply