Clock Generator PLL IP for TSMC
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Clock Generator PLL IP
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13
Clock Generator PLL IP
for TSMC
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- 7nm
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High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
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Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
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General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
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Fractional-N PLL for Performance Computing in TSMC N6/N7
- Frequencies up to 4GHz
- Low jitter (< 10ps RMS)
- Small size (< 0.01 sq mm)
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14GHz Integer-N High-Speed PLL
- Type II hybrid Integer-N LC-PLL
- Quadrature clocks at 14GHz and 7GHz
- Fast locking
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TSMC CLN7FF 7nm Clock Generator PLL - 800MHz-4000MHz
- 800MHz-4000MHz
- Delivers optimal jitter performance over all multiplication settings.
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Differential Clock Receiver to CML on TSMC CLN7FF
- Differential IO clock receiver
- CML differential output to chip core
- Wide Ranges of input frequencies for diverse clocking needs
- Implemented with Analog Bits’ proprietary architecture
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Differential Clock Receiver on TSMC CLN7FF
- Differential IO clock receiver
- Single-ended output to chip core
- Wide Ranges of input frequencies for diverse clocking needs
- Implemented with Analog Bits’ proprietary architecture
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TSMC CLN7FFLVT 7nm Clock Generator PLL - 300MHz-1500MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
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TSMC CLN7FFLVT 7nm Clock Generator PLL - 600MHz-3000MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.