USB IP for GLOBALFOUNDRIES

USB PD 3.1 compliant.
Single chip solution – just two external capacitors.
4 pin package.
Less than 1mm2 area in 180nm.
PROM programmed through vendor message protocol.
Based on Obsidian’s mature PD technology.
Integrated PROM enables customized response to a wide range of vendor requirements.
Active Ra pulls down only requires 10uA at 5V., but is <1K below 2V.
Power <5mW. Enabled by CC data activity. I.e. very low duty cycle.
Programming can be done after assembly into the cable. Fuse lock function.
Supports low cost, 4 layer PCB assembly.

Mixed signal Analog Front End Macros for 65n, 130n, 150nm, and 180n technologies.
RTL code from AFE to I2C compatible register set.
Stand alone C code for Protocol, Device Policy Manager, and System Policy Manager.
IP demonstration & development board, with compliance reports.
Full chip integration of USB Type-C, and associated software.

Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, GlobalFoundries and Samsung
Low power dissipation while active, idle, or suspend
Compliant with the USB Spec Rev2.0/s
Compliant with the UTMI+ Spec Rev1.0 Level3

The USB3.0 PHY IP is designed according to the USB 3.0, USB2.0 Specification.
It supports the USB3.0 5Gbps Super-Speed mode and backward compatibles with the USB2.0 480Mbps High-Speed, 12Mbps Full-Speed, and 1.5Mbps Low-Speed modes
The USB 3.0 PHY interface complies with PHY Interface for PCI Express and USB3.0 Architectures specification (PIPE 3.0) and the USB2.0 PHY interface complies with the UTMI v1.05 specification.

Ported to over 50 different processes and configurations ranging from 65-nm to 14/16-nm FinFET
Supports the USB 2.0 protocol and data rate (480 Mbps)
Supports the USB Type-C specification
USB femtoPHY, USB nanoPHY and USB picoPHY offer a tunability feature that allows quick, post-silicon adjustments that occur due to process variations, or unexpected chip and board parasitic, without modifying the existing design

Ported to over 50 different processes and configurations ranging from 65-nm to 14/16-nm FinFET
Supports the USB 2.0 protocol and data rate (480 Mbps)
Supports the USB Type-C specification
USB femtoPHY, USB nanoPHY and USB picoPHY offer a tunability feature that allows quick, post-silicon adjustments that occur due to process variations, or unexpected chip and board parasitic, without modifying the existing design

Ported to over 50 different processes and configurations ranging from 65-nm to 14/16-nm FinFET
Supports the USB 2.0 protocol and data rate (480 Mbps)
Supports the USB Type-C specification
USB femtoPHY, USB nanoPHY and USB picoPHY offer a tunability feature that allows quick, post-silicon adjustments that occur due to process variations, or unexpected chip and board parasitic, without modifying the existing design

Ported to over 50 different processes and configurations ranging from 65-nm to 14/16-nm FinFET
Supports the USB 2.0 protocol and data rate (480 Mbps)
Supports the USB Type-C specification
USB femtoPHY, USB nanoPHY and USB picoPHY offer a tunability feature that allows quick, post-silicon adjustments that occur due to process variations, or unexpected chip and board parasitic, without modifying the existing design

Ported to over 50 different processes and configurations ranging from 65-nm to 14/16-nm FinFET
Supports the USB 2.0 protocol and data rate (480 Mbps)
Supports the USB Type-C specification
USB femtoPHY, USB nanoPHY and USB picoPHY offer a tunability feature that allows quick, post-silicon adjustments that occur due to process variations, or unexpected chip and board parasitic, without modifying the existing design