Complete USB Type-C Power Delivery PHY, RTL, and Software

Overview

Key Features

• USB PD 3.1 compliant.
• Ultra low power wake function.
• 8 bit register interface for a low speed processor, or optional I2C interface.
• Integrated Chapter 6 protocol reduces required MPU response time to 10mS.
• K code recognition/coding, preamble, CRC, etc load from processor.
• Supports PPS and EPR.
• VCONN 35 or 200mA foldback and over temperature protected driver switches.
• 3V or 5V VCONN options.
• Supports UFP, DFP, and dual role.
• Supports 1.5A & 3A current modes.
• Single 12MHz clock + 32KHz low power clock.
• Low power: normally operates on 32KHz clock.
• Compliance tested port IP.
• Low cost CMOS process technology.
• <0.7mm2 die area at 180nm.
• Optional support for EPR to 48V.
• Available as IP for integration or as complete chip.
• FPGA based Demo/development board available.
• Turnkey integration service available.

Benefits

• Very low power - 32KHz powered down operation.
• High maturity - Compliance tested and in volume production with several major OEM's.
• All configurations.
• Low risk - compliance results available for review.
• Supports all specification optional features.
• Lowest price - Obsidian is never knowingly undersold.

Block Diagram

Applications

• Power supply
• Bus powered devices
• Automotive

Deliverables

• PHY: GDS, verilog model, design review.
• RTL: with Back to back port simulation harness.
• C source code for port policy engine and device policy manager.
• C source code for Windows demo control application.
• Data sheet.
• Compliance test results from demo board.
• Pre sale on-line source walk-through.
• Demo Board: with installed software, and power supplies for back to back system testing, and for use in compliance testing.
• Optional ATE vectors.
• Optional supporting functions include on-chip oscillators, references, and slave I2C.

Technical Specifications