The I3C Advanced Controller Lite is a highly configurable I3C
controller that can be used in microcontroller-based environments
to provide I3C connectivity to any device. It contains controller
capabilities as well as many of the same features as the I3C
Advanced Target. It can be configured in a number of different
ways to allow the core to use the minimum amount of logic to
reduce both area (cost) and power.
I3C Lite Advanced Controller
Overview
Key Features
- Advanced I3C features
- Hot-join
- In-band interrupts
- Timing Control
- Asynchronous Mode 0
- Synchronous Mode
- High-speed mode (HDR-DDR)
- Group addressing
- Target reset
- All Common Command Codes (CCCs) supported
- Target reset
- AMBA APB (v3) application interface
- Memory mapped registers
- DMA, flow control features
- FIFO options
- Internal 2-byte ping-pong buffer
- Internal FIFO (or 32 words for HDR-BT mode)
- Legacy I2C coexistence, including I2C messaging
- Static I2C address support
- Support for I2C pads with 50ns glitch filter
Block Diagram
Applications
- IoT Edge Devices
- Industrial Sensors
- Small Controllers
- Mixed Signal Digital - MEMS
- Smart Sensors
- Smart Lighting
- Temperature, Pressure, Acceleration Monitors
- Personal Health Monitors
- I3C Connected Devices
Deliverables
- Verilog RTL source code
- Test bench with test suites
- Documentation including User's Guide and Integration Guide
- Technology-independent synthesis constraints
Technical Specifications
Maturity
Silicon Proven
Availability
Now
Related IPs
- I3C Lite Advanced Target
- NAND flash Controller using Altera PHY Lite
- I3C Master / Slave Controller w/FIFO (APB Bus)
- LPDDR Secure Controller supporting LPDDR5, LPDDR4 and LPDDR4X with Advanced Features Package
- LPDDR Secure Controller supporting LPDDR5X, LPDDR5 and LPDDR4X with Advanced Features Package
- I3C V1.1 Advanced Controller