HDMI2.1 Transmitter PHY & Controller

Overview

Innosilicon HDMI TX IP is designed for transmitting video and audio data from a video source device to a display device, which is compatible with HDMI2.1, HDMI2.0 and HDMI1.4 specifications.
Innosilicon HDMI TX IP consists of the digital controller and the physical layer. The digital controller receives video, audio, synchronous signals and control signals from SoC logic and outputs encoded data to physical layer.
The physical layer contains 4 data channels, PLL, and bias circuit. Each data channel consists of serializer and driver. The serializer converts the parallel input data to 1-bit high speed serial stream and the driver converts the digital serial data to low swing differential signals with typical DC-coupled connection. The data rate is up to 12Gbps per channel. In HDMI2.0 and HDMI1.4 modes, the first data channel serves as the clock channel and transmits clock signal up to 340MHz to receiver. PLL generates the clocks required by data channels and the digital logic. The bias circuit generates voltage and current reference.
Innosilicon HDMI TX IP offers reliable implementation for HDMI interface, which can be integrated in the SOC used in multimedia device.

Key Features

  • Area: 0.8874mm2 (1020um x 870um) including IO and ESD
  • Note: The area parameters are for reference only. Please refer to the final LEF file for the actual values.
  • Compliant with HDMI2.1, HDMI2.0, HDMI1.4 and DVI1.0 specifications
  • Up to 12Gbps per data channel
  • Typical 24MHz or 27MHz reference clock
  • Support YUV4:4:4, YUV4:2:2, YUV4:2:0 and RGB4:4:4 video format
  • Support 8/10/12-bit color depth
  • Support 8-ch I2S or 2-ch SPDIF interface for audio input
  • Support audio sampling rate up to 192KHz
  • Support standard I2C master interface for DDC interface
  • Support Reed-Solomon Forward Error Correction (RS-FEC)
  • Support programmable output swing, termination and pre-emphasis
  • Support BIST logic
  • APB interface for internal register access
  • Built-in low jitter PLL and bandgap reference

Benefits

  • Very Low power
  • Small Area, easy to integrate
  • Test chip and test board available
  • FPGA integration support available

Deliverables

  • Datasheet
  • Encrypted Verilog Model
  • Timing Library Model (LIB)
  • Library Exchange Format (LEF)
  • GDSII Database
  • Evaluation Board if Available

Technical Specifications

Foundry, Node
SMIC 14nm, TSMC 28/22nm
SMIC
In Production: 14nm
Silicon Proven: 14nm
TSMC
In Production: 22nm , 28nm
Silicon Proven: 22nm , 28nm
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Semiconductor IP