How to Design Analog/Mixed Signal (AMS) at 28nm
Wireless, networking, storage, computing and FPGA applications have been moving aggressively to advanced process nodes to take advantage of lower power consumption, improved performance and area reduction. Today, most of these applications integrate a significant amount of analog/mixed signal (AMS) or RF together with digital circuits. Since AMS often occupies over 50% of the chip area, applying traditional, conservative approaches when migrating to an advanced node diminishes and possibly eliminates these benefits.
Due to significant changes in physical effects and device performance, a simple migration to next node is not practical. AMS circuits need to be optimized and often completely redesigned to meet performance specs. This requires design companies to have an AMS IP flow fully ready at the same time as, or even earlier than, the digital flow in order to realize silicon at advanced process nodes.
A survey of 561 predominantly analog and mixed-signal designers and CAD engineers from over 150 companies, collected during Cadence worldwide Mixed-Signal Seminars in March 2011, confirmed that 65nm has became mainstream for mixed-signal. The survey also showed strong AMS design activity at 40 and 28nm.
To read the full article, click here
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related Blogs
- How to Safeguard Automotive OTA Updates at Scale
- How to Shift Left on Low-Power Design Verification, Early and Quickly
- How to Maximize PCIe 6.0's Advantages with End-to-End PCIe Design Solutions
- How to Augment SoC Development to Conquer Your Design Hurdles
Latest Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits
- eUSB2 Version 2 with 4.8Gbps and the Use Cases: A Comprehensive Overview