MIPI DigRF 3G IP

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Compare 6 MIPI DigRF 3G IP from 1 vendors (1 - 6)
  • MIPI M-PHY in TSMC 65LP
    • Supports the MIPI Standard for M-PHY, Draft Specification v0.90.00-r02 and DigRF v4 V1.10.00.0.04
    • Dual-simplex point-to-point interface with ultra low voltage differential signaling
    • Slew-rate control for EMI reduction
    • Supports HS mode (GEAR 1-2, A & B)
    Block Diagram -- MIPI M-PHY in TSMC 65LP
  • MIPI M-PHY in SMIC 90LL
    • Supports MIPI Standard for M-PHY v3.0.
    • Dual-simplex point-to-point interface with ultra low voltage differential signaling
    Block Diagram -- MIPI M-PHY in SMIC 90LL
  • MIPI M-PHY in SMIC 130nm
    • Complies with MIPI Standard for M-PHY v3.0
    • Slew-rate control for EMI reduction
    • Supports HS modes GEAR 1-3
    Block Diagram -- MIPI M-PHY in SMIC 130nm
  • MIPI M-PHY (HS-G3) in GF 28LP
    • Complies with MIPI Standard for M-PHY v3.0
    • Dual-simplex point-to-point interface with ultra low voltage differential signaling
    Block Diagram -- MIPI M-PHY (HS-G3) in GF 28LP
  • MIPI M-PHY DigRF Compliant IP
    • Complies with MIPI Standard for M-PHY, Draft Specification v0.90.00- r02 and DigRF v4 V1.10.00.0.04
    • Dual-simplex point-to-point interface with ultra low voltage differential signaling
    • Slew-rate control for EMI reduction
    • Supports HS mode (GEAR 1-2, A & B)
    Block Diagram -- MIPI M-PHY DigRF Compliant IP
  • MIPI M-PHY Compliant (HS-G2) IP
    • Complies with MIPI Standard for M-PHY, Draft Specification v0.90.
    • Dual-simplex point-to-point interface with ultra low voltage differential signaling
    • Slew-rate control for EMI reduction
    • Supports all HS modes (GEAR 1-2)
    Block Diagram -- MIPI M-PHY Compliant (HS-G2) IP
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