Reed-Solomon IP
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Reed-Solomon IP
from 22 vendors
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VESA DisplayPort 2.0 FEC RX
- VESA DisplayPort 2.0 compliant
- Reed Solomon RS (198,194) FEC, 8-bit symbols
- Multiple symbols per clock
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VESA DisplayPort 1.4 RX IP Subsystem for Xilinx FPGAs
- Complete DisplayPort™ 1.4 Receiver solution with support for VESA Display Stream Compression (DSC)
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HDMI 2.1 Forward Error Correction (FEC) Receiver
- HDMI 2.1 compliant
- Reed-Solomon RS(255,251) FEC, 8-bit symbols
- Supports 3-lane and 4-lane operation
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Reed Solomon Encoder
- Parameterizable bits per symbol
- Programmable codeword length
- Programmable number of errors
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Reed Solomon Decoder
- Parameterizable bits per symbol
- Programmable codeword length
- Programmable number of errors
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Reed Solomon Error Correcting Code ECC
- Asynchronous operation
- No clocks required.
- No storage like memories SRAMS/ROMS/FilipFlops used
- No iterative Feedback in the pipeline
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Reed Solomon Erasure Code
- Asynchronous operation
- No clocks required.
- No storage like memories SRAMS/ROMS/FilipFlops used
- No iterative Feedback in the pipeline
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OFDM Baseband Processor
- Customized transmit and receive physical layer chains.
- Fully synchronous design enabling high throughput TDD operation.
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Highly Integrated Reed Solomon Codec
- Polynomial compliant to Intelsat IESS-308; RTCA DO-217 AppendixF, Revision D Standard.
- High throughput rate.
- Fully programmable to correct from 1 to 10 error bytes or 20 erasure bytes per block.
- Configurable odd or even number of check bytes.
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Configurable Reed Solomon Encoder
- Fully parameterized Reed Solomon Encoder.
- Adaptive code rate can be varied on the fly.
- Shortened codes support.
- Parameterized bits per symbol, codeword length and parity bytes.