Cortex-M33 IP

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  • Arm Cortex-M33
    • TrustZone for Armv8-M - A foundation for security for embedded devices. TrustZone offers software isolation to code, memory and I/O while retaining the requirements of embedded applications: real-time deterministic response, minimal switching overhead, and ease of software development.
    • Co-processor interface - A dedicated bus for extending the operation of the processor with tightly coupled co-processors to handle frequent and compute intensive operations in an ecosystem friendly manner. The interface supports up to eight accelerators and takes into account the security state of the co-processor.
    • SIMD, saturating arithmetic, fast MAC - Powerful instruction set for accelerating DSP applications, built right into the processor. A highly optimized DSP library built using these instructions is available free-of-charge from the Arm website (CMSIS Library).
    • Memory Protection Unit (MPU) - Software reliability and system security improves when each module is allowed access only to specific areas of memory required for it to operate. This protection prevents unexpected access that may overwrite critical data. Each of the security zones can have a dedicated MPU that may be configured with a different number of regions.
    Block Diagram -- Arm Cortex-M33
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