MIPI M-PHY IP for TSMC
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21
MIPI M-PHY IP
for TSMC
from 7 vendors
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MIPI M-PHY G4 Designed For TSMC 28nm HPC+
- Compliant to MIPI Alliance Standard for M-PHY specification Version 4.1
- Supports M-PHY Type-I system
- Support for Clock and Data Recovery Options
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MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
- Supports MIPI® Alliance Specification for M- PHY® Version 4.1.
- Dual-simplex point-to-point interface with ultra-low voltage differential signaling.
- Slew-rate control for EMI reduction.
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MIPI 4.1 M-PHY HS Gear 4
- Supports high speed data transfer G4A/B and backward compatible
- Multi-lane compatible
- Supports 4 reference clocks as per MIPI 4.1 specification
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MIPI MPHY v3.1, 2Tx-2Rx Type-1, TSMC 28HPC+, N/S orientation
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
- High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
- Burst mode CDR with short sync length (< 16SI)
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
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MIPI MPHY v3.1, 2Tx-2Rx Type-1, TSMC 16FFC, N/S orientation(ASIL-B)
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
- High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
- Burst mode CDR with short sync length (< 16SI)
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
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MIPI MPHY v3.1, 2Tx-2Rx Type-1, TSMC 12FFC, N/S orientation(ASIL-B)
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
- High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
- Burst mode CDR with short sync length (< 16SI)
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
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MIPI MPHY v4.1, 2Tx-2Rx Type-1, TSMC N7, 1.8V, N/S orientation(ASIL-B)
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2)
- High speed gears, HS-G1A/B, HS-G2A/B, HS-G3A/B and HS-G4A/B with scalable power consumptions
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
- Supports reference-less function during low-speed operation
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MIPI MPHY v4.1, 2Tx-2Rx Type-1, TSMC N6, 1.8V, N/S orientation(ASIL-B)
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2)
- High speed gears, HS-G1A/B, HS-G2A/B, HS-G3A/B and HS-G4A/B with scalable power consumptions
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
- Supports reference-less function during low-speed operation
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MIPI MPHY v4.1, 2Tx-2Rx Type-1, TSMC N5A, 1.2V, N/S orientation(ASIL-B)
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2)
- High speed gears, HS-G1A/B, HS-G2A/B, HS-G3A/B and HS-G4A/B with scalable power consumptions
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
- Supports reference-less function during low-speed operation
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MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 28 HPC+
- RX:DFE+CTLE, TX:2-tap FFE
- Max. Channel Loss:~14dB @6GHz Nyquist
- Low operation current and low standby current
