Video Interface IP for SMIC
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6
Video Interface IP
for SMIC
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V-by-One Rx IP, Silicon Proven in SMIC 40LL
- Wide-range data rate, up to 1Gbps, and the associated clock is DDR clock (1/2 of the data rate, up to 500MHz)
- 16 channels total 128 bits of parallel data, each channel has a bit width of 8 bits
- DC coupling mode
- Multi-channel shared offset
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V-by-One 1.4 Receiver
- Compliant with V-by-One 1.4 specification
- Support for up to 4 channels, with up to 4 Gbps data rate per channel
- CDR support to resolve skew problems between clock and data in conventional transfer systems
- Supports up to 40-bit Deep-Color in RGB/YCbCCr/RGBW/RGB/Y format Digital Video Output with selectable edge clocking
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V-by-One 1.4 Transmitter
- Compliant with V-by-One 1.4 specification
- Support for up to 8 channels, with up to 4 Gbps data rate per channel
- Supports up to 40-bit Deep-Color in RGB/YCbCCr/RGBW/RGB/Y format Digital Video Output with selectable edge clocking
- Supports scrambling and 8b/10b encoding
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DisplayPort 1.2 Transmitter
- Compliant with DisplayPort Standard 1.2
- Main Link supports 1, 2 or 4 lanes at 1.62Gbps, 2.7Gbps and 5.4Gbps
- Supports Deep Color up to 48bpp
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V-By-One PHY & Controller (Tx+ Rx)
- Area: 1.224mm2 (1440um x 850um) including IO and ESD
- Compliant with V-By-One HS 1.4 standard
- Support 1/2/4/8-lane configuration
- Support 3/4/5-byte mode
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Video-by-One Receiver IP_16ch
- Compliant with V-by-One HS Standard Version 1.4
- Supports 1/2/4/8/16-lane configuration
- Supports 3/4/5-byte mode
- Supports data rate up to 4Gbps per lane