Multi-Protocol PHY IP for SMIC

Welcome to the ultimate Multi-Protocol PHY IP for SMIC hub! Explore our vast directory of Multi-Protocol PHY IP for SMIC
All offers in Multi-Protocol PHY IP for SMIC
Filter
Filter

Login required.

Sign in

Compare 2 Multi-Protocol PHY IP for SMIC from 2 vendors (1 - 2)
  • 10Gbps Multi-Link and Multi-Protocol PCIe 4.0 PHY IP for SMIC
    • Supports USB 3.1, PCIe 3.0/2.0/1.0, DP-TX v1.4/ eDP-TX v1.4b, SATA 3, QSGMII,and SGMII
    • Supports PCIe L1 sub-states
    • Supports SRIS and internal SSC generation
    • Multi-protocol support for simultaneous independent links
  • PCIe/USB/SATA Combo PHY
    • Standard PHY interface (PIPE) enables multiple IP sources for PCIe/USB/SATA MAC Layer
    • Dual port PIPE with shared REF_CLK configurable to be 2-lane PCIe PHY
    • Supports 2.5 GT/s and 5.0 GT/s serial data transmission rate in PCIe mode
    • Supports 5.0 GT/s serial data transmission rate in USB mode
×
Semiconductor IP