MIPI C-PHY IP for SMIC
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MIPI C-PHY IP
for SMIC
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MIPI PLL
- All output programmable dividers produce 50% duty cycle for both even and odd divisors
- High performance, highly programmable MIPI Pixel PLL
- Digital CMOS process
- Low power dissipation
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MIPI C-PHY DSI TX IP
- Compliant with MIPI® Alliance Specification for Display Serial Interface (DSI) V1.2
- Compliant with MIPI® Alliance Standard for Display Bus Interface (DBI) V2.0
- Compliant with MIPI® Alliance Standard for Display Pixel Interface (DPI) V2.0
- Compliant with MIPI® Alliance Specification for C-PHY V1.1
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MIPI C-PHY DSI RX IP
- Compliant with MIPI® Alliance Specification for Display Serial Interface (DSI) V1.2
- Compliant with MIPI® Alliance Specification for C-PHY V1.1
- Compliant with MIPI® Alliance Specification for Display Command Set (DCS) V1.3
- Compliant with AMBA 3.0 APB Specification
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MIPI C-PHY RX PHY
- Analog mixed-signal hard-macro LP/HS Receiver solution
- Compliant with MIPI Alliance Standard for C-PHY specification v1.1.
- Integrated PHY Protocol Interface (PPI) supports interfaces to CSI, DSI and UniPro™ MIPI® protocols
- Expandable to support 3 data trios