IP Catalog > Interface IP > Memory Interface IP > NVM Express IP

NVM Express IP

Welcome to the ultimate NVM Express IP hub! Explore our vast directory of NVM Express IP cores.

NVMe IP cores are compliant with NVM Express base specificationthat performs memory transfer to or from the NVMe storage like SSDs. These IP cores are designed to handle NVMe protocols without the need for external DDR memory via a PCIe interface. NVMe IP cores are ideal for applications that require large storage capacity with high performance and are available with flexible vendor-specific PCIe IP to access SSD.

All offers in NVM Express IP
Filter
Filter

Login required.

Sign in

Login required.

Sign in

Search (26)
Compare 26 NVM Express IP from 10 vendors (1 - 10)
  • ReRAM NVM in 130nm CMOS, S130
    • Technology: 130nm, SkyWater S130
    • Mask Adder: 2
    • Supply Voltage: 1.8V Read, 1.8V+3.3/3.6V Program
    Block Diagram -- ReRAM NVM in 130nm CMOS, S130
  • ONFI Flash Controller
    • AXI System Interface
    • NAND Flash
    Block Diagram -- ONFI Flash Controller
  • Universal NVM Express Controller (UNEX)
    • Compliant to NVM Express 1.1
    • Support for configurable number of IO Queues
    • Support for configurable Queue depth
    Block Diagram -- Universal NVM Express Controller (UNEX)
  • NVM Express IP Core
    • High performance PCIe SSD with no host CPU load
    • Cost reduction thanks to interface standardization
    Block Diagram -- NVM Express IP Core
  • High Performance NVMe for PCIe-based storage
    • NVM Express Compliant
    • Automatic NVMe Command management
    • Single I/O queue
    Block Diagram -- High Performance NVMe for PCIe-based storage
  • NVME-HOST-IP VIRTEX 7
    • - PCIe RP and EP register configuration is done automatically.
    • – NVMe register configuration is done automatically.
    • – Able to manage 8 Name Spaces.
    • – Able to manage until 16 IO Queue to fit specific user requirement. Each IO Queue is independent.
    Block Diagram -- NVME-HOST-IP VIRTEX 7
  • Xilinx Kintex 7 NVME HOST IP
    • - PCIe RP and EP register configuration is done automatically.
    • - NVMe register configuration is done automatically.
    • - Able to manage 8 Name Spaces.
    • - Able to manage until 16 IO Queue to fit specific user requirement.
    Block Diagram -- Xilinx Kintex 7 NVME HOST IP
  • Xilinx ZYNQ NVME HOST IP
    • -PCIe RP and EP register configuration is done automatically.
    • – NVMe register configuration is done automatically.
    • – Able to manage 8 Name Spaces.
    • – Able to manage until 16 IO Queue to fit specific user requirement. Each IO Queue is independent.
    Block Diagram -- Xilinx ZYNQ NVME HOST IP
  • Xilinx UltraScale Plus NVME Hhost IP
    • PCIe RP and EP register configuration is done automatically.
    • NVMe register configuration is done automatically.
    • Able to manage 8 Name Spaces.
    Block Diagram -- Xilinx UltraScale Plus NVME Hhost IP
  • Xilinx Ultra Scale NVME Host IP
    • This IP can be customized according to specific needs (application-specific requirement).
    Block Diagram -- Xilinx Ultra Scale NVME Host IP
×
Semiconductor IP