eMMC IP
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54
eMMC IP
from 12 vendors
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10)
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eMMC 5.1 Host Controller
- Compliant with eMMC Specification Version 5.0
- Supports one of the following System/Host Interfaces: AHB, AXI or OCP
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eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-NS
- Silicon proven, fully compliant core
- Premier direct support from IP core designers
- Easy-to-use industry standard test environment
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SD/eMMC Host Controller
- Supports selection between SD and eMMC
- Supports CRC7 and CRC16 generation and verification on Hardware
- Supports multiple block transfer
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eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-EW
- • Suitable for Transmitter, Receiver, and Data Strobe pins
- VCORE Pre driver voltage
- VCCQ Post driver voltage
- TJ Junction temperature
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eMMC Verification IP
- Supports eMMC standard JESD84-A441, JESD84-B45, JESD84-B50, JESD84-B51 and JESD84-B51A specification.
- Supports stream transfer operations.
- Supports three different data width bus modes
- 1-bit(default)
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eMMC Synthesizable Transactor
- Supports eMMC standard JESD84-A441, JESD84-B45, JESD84-B50, JESD84-B51 and JESD84-B51A specification.
- Supports stream transfer operations.
- Supports three different data width bus modes
- 1-bit(default)
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eMMC Host Controller IIP
- Compliant with JESD84-B50 Specification and earlier versions
- Compliant with JEDEC eMMC CQHCI for Command Queuing
- SD host controller Specification 6.0 compliant
- Supports different data bus width modes : 1-bit, 4-bit, 8-bit.
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eMMC Device Controller IIP
- Compliant with JESD84-B51 Specification and earlier versions
- Compliant with JEDEC eMMC CQHCI for Command Queuing
- Supports different data bus width modes : 1-bit, 4-bit, 8-bit.
- Supports Command queuing
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eMMC v5.1/A Verification IP
- Compliant with JEDEC eMMC version JESD84 - B51 and JESD84 – B51A.
- Supports eMMC devices from all leading vendors.
- Supports configuration for both host and device.
- Support all data widths 1x, 4x, and 8x.
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TSMC N3P 1.8V IO Platform supporting cells
- Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
- Fully integrated hard macro with high speed IOs and DLL/delay lines
- Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
- Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution