eMMC Controller IP
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8
eMMC Controller IP
from 6 vendors
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8)
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eMMC 5.1 Host Controller
- Compliant with eMMC Specification Version 5.0
- Supports one of the following System/Host Interfaces: AHB, AXI or OCP
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SD/eMMC Host Controller
- Supports selection between SD and eMMC
- Supports CRC7 and CRC16 generation and verification on Hardware
- Supports multiple block transfer
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eMMC Device Controller
- Compliant to the eMMC Electrical Standard 5.1A
- Supports Backwards Compatible, High Speed SDR, High Speed DDR, HS200 and HS400 transfer modes
- Host transfer rate of up to 400 MByte/s in HS400 mode
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eMMC 5.1 Device Controller
- Compliant with eMMC 5.1 specification
- Peak bandwidth of 3.2 Gbps or 400 MB/s
- Additional Data Strobe signal for HS400 mode
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Low-power SD/eMMC host controller IP provides advanced high-performance 32- and 64-bit AXI interface to the SoC
- Compliant with SD HCI specification
- CQE capable of reordering task execution based on priority
- Data prefetching for back to back tasks—further improves random IOPS
- Low-power features with power gating and multi-power rails
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eMMC 5.1 /SD-SDIO3.0 Host Controller & PHY
- The Host controller supports:
- The data is transferred using:
- eMMC 5.1 features:
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eMMC 4.5 Card Slave Controller
- Compatible with eMMC/MMC specification 4.5.
- Supports Dual Data Rate (DDR) data transfer.
- Enhanced MMC features including Boot, Sleep Mode, Reliable Write, Multiple Partitions and Security.
- Supports e2.MMC command set and HS200 mode for 200MByte/sec data rate.
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SD 3.0/eMMC 4.41 Host Controller
- Host controller for SD and SDIO 3.0 with options to support eMMC 4.41 interface.
- Allows host CPU to access SD and MMC devices.
- Simple user interface optimized for on-chip bus connection.
- Choices of AHB, AXI, APB, PLB, Wishbone, Avalon, SH4 and generic user interface.