Clock Generator PLL IP for SMIC
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Clock Generator PLL IP
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12
Clock Generator PLL IP
for SMIC
from 6 vendors
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Fractional-N Frequency Synthesizer PLL
- Wide functional range allows all frequencies in a system to be synthesized with one PLL macro
- Input & output frequency ranges greater than 1000:1
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High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
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Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
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General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
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Fractional-N PLLs for Performance Computing
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
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600MHz General Purpose Clock Multiplier PLL for 180n CMOS
- Wide range N, M, P integer dividers.
- 40MHz – 600MHz output frequency range.
- Compare frequency range 8MHz – 75MHz.
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4-GHz Jitter-optimized low-power digital PLL
- - Jitter below 10-ps
- - Super small: 90 x 90 microns!
- - Very low power: 15-mW
- - Broad frequency range: 4-GHz
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32kHz Ultra-Fast-Lock IoT PLL
- Input frequency range includes 32.768kHz
- Output frequency range: <10MHz to >200MHz
- Ultra-fast start-up. Frequency calibration ensures Fout is within 2% in <1.4ms from cold start
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4-GHz Jitter-optimized low-power digital PLL
- Jitter below 10-ps
- Super small: 90 x 90 microns!
- Very low power: 15-mW