LDO Linear Voltage Regulator

Overview

Low dropout linear voltage regulator

Key Features

  • Supply sensitive blocs from a low-quiescent LDO​
  • Low leakage implementation
  • Programmable output voltage
  • Configurable power stages for area optimization​
  • Embedded bandgap to provide Vref at system-level

Block Diagram

LDO Linear Voltage Regulator Block Diagram

Technical Specifications

Foundry, Node
TSMC 40nm LP
Maturity
Pre-silicon
TSMC
Pre-Silicon: 40nm LP
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Semiconductor IP