Fault Resistant Clock and Reset Monitor
Overview
This is a Clock and reset monitor block. It monitors clock and reset signals and report if there are changes in clock beyond a certain range of frequencies and glitches on reset signals.
Key Features
- Number of Clocks and Reset Selection. (Parameterised)
- Selection of Properties of clocks and reset to be monitored.
Benefits
- This IP is built with Fault Resistant technology so it remain stable and right warnings to SOC in case of a Fault Event and Hacking attempts.
Block Diagram
Applications
- SOC IP Block can be used inside any Large IP or Subsystem or a SOC to monitor state of different Clocks and resets and generate warnings as per set configurations.
Deliverables
- Source Code in verilog.
- Test Bench.
- Simulation Scripts.
- Synthesys scripts.
- Documentation
- User Guide.
Technical Specifications
Maturity
Stable
Availability
Avaliable