Integer Multiplier IP
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Integer Multiplier IP
from 2 vendors
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Parameterizable pipelined multiplier
- Synthesizeable, technology-independent IP Core for FPGA/ASIC and SoC
- Coded with SystemVerilog
- Wrapped with AXI Stream interface
- 16-bit Fixed-Point Representation/Operation
- Suitable for DSP or Machine Learning Applications
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Multiplexer - amplifier
- SMIC CMOS 0.18 um
- Input and output matching 50 Ohm
- No external matching components required
- Built-in adjustment of matching