Random Number Generator IP
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18
Random Number Generator IP
from 8 vendors
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10)
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NIST ESV certified, AIS-31, FIPS (SP800-90A/B/C) True Random Number Generator
- Non-deterministic Random Number Generator, FIPS-140 SP800-90A/B compliant, ESV certified for NRBGs and DRBGs (#E167).
- High performance, low power, fully digital, standard cell only, supports all CMOS nodes.
- Available as standalone RBG or embedded in the Rambus RT-130, RT-630, RT-660 Root of Trusts
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True Random Number Generator
- NIST 800-90B compliant
- AIS-31 start-up and on-line tests (optional)
- Passed NIST 800-22, 90B and AIS31 test suites
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True Random Number Generator (TRNG)
- Compact Size
- Autonomous Operation
- Parameterizability
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Deterministic Random Bit Generator (DRBG)
- NIST 800-90A/B/C compliant
- Health test
- AES-CTR based (CTR_DRBG)
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TRNG fully compliant with NIST 800-22
- ASIC or FPGA target
- Generates 256 random bits at a time
- Multiple ring oscillators with post processing for true random bit generation
- Fully compliant with latest NIST 800-22 800-22 and Diehard Random test suite
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True Random and Pseudorandom Number Generator
- Satisfies Federal Information Processing Standard (FIPS) Publication 140-2 Annex C (“approved” random number generator) from the US National Institute of Standards and Technology (NIST). Passes the requirements of the NIST SP 800-22.
- High security (128 bit entropy; 256 version available)
- Initial seed provided from internal entropy source
- Automatic re-seeding
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Cryptographically Secure Pseudo Random number Generator IP Core
- Generates cryptographically secure pseudo-random numbers
- Uses the CTR_DRBG algorithm per NIST publication SP800-90
- Generates 128-bit data blocks with 8, 16, 32, 64 or 128-bit wide data interface
- Provides security strength of 128,192 and 256 bits
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Pseudo Random Number Generator, high-speed version (AES256_CTR_DRBG)
- Fully digital design
- Portable to any ASIC or FPGA technology
- Fully standard compliant
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Pseudo Random Number Generator, balanced version (AES256_CTR_DRBG)
- Balanced Between Speed and Resource Requirements: XIP8103B can achieve over 2 Gbps throughput, while consuming only about 4000 Lookup Tables (LUTs) in a typical FPGA implementation.
- Versatility: XIP8103B supports the forward prediction resistance mode, which can be set on and off between output generation, as well as the use of personalization strings and additional inputs for instantiation and reseeding.
- Standard Compliance: XIP8103B is compliant with the NIST SP800-90A specification.
- XIP8103B can be combined with Xiphera’s NIST SP800-90Bcompliant XIP8001B to form a NIST SP800-90C compliant Random Bit Generator (RBG).
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Fast NIST ESV certified, FIPS (SP800-90A/B/C) True Random Number Generator
- Non-deterministic Random Number Generator, FIPS-140 SP800-90A/B compliant, ESV certified for NRBGs and DRBGs (#E225).
- High performance, low power, fully digital, standard cell only, supports all CMOS nodes.
- Available as standalone RBG or embedded in the Rambus RT-130, RT-630, RT-660 Root of Trusts