USB 3.2 PHY IP
Welcome to the ultimate USB 3.2 PHY IP hub! Explore our vast directory of USB 3.2 PHY IP
All offers in
USB 3.2 PHY IP
Filter
Compare
10
USB 3.2 PHY IP
from 4 vendors
(1
-
10)
-
USB 3.2 Gen2x2 with PIPE 4.3 and USB2.0 with UTMI+ interface
- Fully compliant USB 3.2 Gen2x2 with PIPE 4.3 and USB2.0 with UTMI+ interface
-
USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP, Silicon Proven in UMC 28HPC
- Compliant with PCIe 3.1 Base Specification
- Compliant with Universal Serial Bus 3.2 Specification
- Compliant with Universal Serial Bus 2.0 Specification
- Compliant with UTMI 1.05 Specification
-
USB-C 3.2 SS/SSP PHY in Type-C in TSMC (N7, N6, N5, N3E)
- Supports 20Gbps, 10Gbps, and 5Gbps data rates
- Supports 480 Mbps, 12 Mbps, and 1.5 Mbps data rates
- x1 and x2 configurations (USB 3.2 and USB 3.1 PHY only)
- Low active and standby power
-
USB-C 3.2 SS/SSP PHY in Type-C in Samsung (SF4X, SF4E, SF2)
- Supports 20Gbps, 10Gbps, and 5Gbps data rates
- Supports 480 Mbps, 12 Mbps, and 1.5 Mbps data rates
- x1 and x2 configurations (USB 3.2 and USB 3.1 PHY only)
- Low active and standby power
-
USB 3.2 Gen2/Gen1 PHY IP in TSMC(5nm,6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm)
- USB 3.2 Gen2
- 1. Worldwide smallest USB 3.2 Gen2 PHY IP (e.g. IP size @28HPC+ is smaller than 0.7mm²)
- 2. Fully compliant with Universal Serial Bus (USB) 3.2 Gen2 and 2.0 electrical specifications
- 3. Supports clock inputs from 10/12/19.2/24/25/27/30/40MHz crystal oscillator and external clock sources from the core
-
USB 3.2 Gen2 PHY IP, Silicon Proven in UMC 28HPC
- Worldwide smallest USB 3.2 Gen2X1 PHY IP in 12/16nm process (IP size is smaller than 0.46mm²)
- Fully compliant with Universal Serial Bus (USB) 3.2 Gen2X1 and 2.0 electrical specifications
- Supports clock inputs from 25MHz crystal oscillator and external clock sources from the core
- Supports 3-Tap FIR Equalization for TX and CTLE+1-Tap DFE for RX