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Serdes IP for TSMC

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Compare 64 Serdes IP for TSMC from 14 vendors (1 - 10)
  • Multiprotocol SerDes PMA
    • Supports over 30 protocols including CEI 6G & 11G SR, MR, LR, Ethernet 10GBASE-X/S/K/R, PCIe Gen1/2/3/4, V-by-One HS/US, CPRI, PON, OTN/OTU, 3GSDI, JESD204A/B/C, SATA1-3, XAUI, SGMII
    • Programmable (De)Serialization width: 8, 10, 16, 20, 32, or 40 bit
    • Tx ring PLL includes fractional multiplication, spread spectrum and Jitter Cleaner function for Sync-E and OTU
    • Core-voltage line driver with programmable pre-and post-emphasis
    Block Diagram -- Multiprotocol SerDes PMA
  • 1-112Gbps Integrated Laser Driver and Optical SerDes
    • Optical Optimization:
    • Integrated laser driver
    • RX front-end architected for optical signaling
    • Non-linear DSP equalization that corrects for both static and dynamic nonlinearity components.
    Block Diagram -- 1-112Gbps Integrated Laser Driver and Optical SerDes
  • 1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes
    • High speed performance
    • Low power architecture
    • Sub-sampling clock multiplier
    Block Diagram -- 1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes
  • 224G-LR SerDes PHY enables 1.6T and 800G networks
    • Optimized Performance, Power and Area with Design Agility
    • Supports full-duplex 1.25 to 225Gbps data rates
    • Enables 1.6T, 800G, 400G, and 200G Ethernet with a PHY + Controller solution
    • Supports evolving IEEE 802.3 and OIF-CEI-224G standard electrical specifications
    • Meets the performance requirements of chip-to-module (VSR), chip-to-chip (MR), and copper/backplane (LR) interconnects
    Block Diagram -- 224G-LR SerDes PHY enables 1.6T and 800G networks
  • 112G-VSR PAM4 SerDes PHY - PPA optimized for short reach connectivity
    • 1.25Gbps to 116Gbps flexible data rates allowing simultaneous support of different protocols including Ethernet and OTN
    • Power optimized for short-reach applications with configurability
    • Superior bit error rate (BER) with extra performance margin beyond short-reach standard requirements
    • Beachfront optimized floorplan allows north-south and east-west SoC edge placement
    • Comprehensive on-chip diagnostic features make system testing and debugging quick and easy
    • Enables 800Gbps networking with PHY and Controller solutions
    Block Diagram -- 112G-VSR PAM4 SerDes PHY - PPA optimized for short reach connectivity
  • 5G Combo Serdes for USB/PCIe, TSMC 28HPC+, N/S orientation
    • Supports 1.25G to 10.3125Gbps data rates and compact die area
    • Supports up to 25dB channel loss@ 5.15625GHz
    • Supports RX loss-of-signal detection
    • Supports X1, X2 and X4 lanes
    Block Diagram -- 5G Combo Serdes for USB/PCIe, TSMC 28HPC+, N/S orientation
  • 5G Combo Serdes for USB/PCIe, TSMC 22ULL 2.5V, N/S orientation
    • Supports 1.25G to 10.3125Gbps data rates and compact die area
    • Supports up to 25dB channel loss@ 5.15625GHz
    • Supports RX loss-of-signal detection
    • Supports X1, X2 and X4 lanes
    Block Diagram -- 5G Combo Serdes for USB/PCIe, TSMC 22ULL 2.5V, N/S orientation
  • 5G Combo Serdes for USB/PCIe, TSMC 22ULL 1.8V, N/S orientation
    • Supports 1.25G to 10.3125Gbps data rates and compact die area
    • Supports up to 25dB channel loss@ 5.15625GHz
    • Supports RX loss-of-signal detection
    • Supports X1, X2 and X4 lanes
    Block Diagram -- 5G Combo Serdes for USB/PCIe, TSMC 22ULL 1.8V, N/S orientation
  • 5G Combo Serdes for USB/PCIe, TSMC 12FFC, N/S orientation
    • Supports 1.25G to 10.3125Gbps data rates and compact die area
    • Supports up to 25dB channel loss@ 5.15625GHz
    • Supports RX loss-of-signal detection
    • Supports X1, X2 and X4 lanes
    Block Diagram -- 5G Combo Serdes for USB/PCIe, TSMC 12FFC, N/S orientation
  • 10G Combo Serdes for USB/PCIe/Ethernet, TSMC 28HPC+, N/S orientation
    • Supports 1.25G to 10.3125Gbps data rates and compact die area
    • Supports up to 25dB channel loss@ 5.15625GHz
    • Supports RX loss-of-signal detection
    • Supports X1, X2 and X4 lanes
    Block Diagram -- 10G Combo Serdes for USB/PCIe/Ethernet, TSMC 28HPC+, N/S orientation
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