Interconnect IP for SMIC
Welcome to the ultimate Interconnect IP for SMIC hub! Explore our vast directory of Interconnect IP for SMIC
All offers in
Interconnect IP
for SMIC
Filter
Compare
163
Interconnect IP
for SMIC
from 18 vendors
(1
-
10)
-
Complete USB Type-C Power Delivery PHY, RTL, and Software
- USB PD 3.1 compliant.
- 8 bit register interface for a low speed processor, or optional I2C interface.
- Integrated Chapter 6 protocol reduces required MPU response time to 10mS.
-
MIPI D-PHY DSI RX (Receiver) in SMIC 130nm
- SMIC 130nm
- Consists of 1 Clock lane and 4 Data lanes
- Supporting the MIPI Standard 1.1 for D-PHY
-
PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 28HKMG
- Compatible with PCIe base Specification
- Full compatible with PIPE4.2 interface specification
- Independent channel power down control
- Implemented Receiver equalization Adaptive-CTLE to compensate insertion loss
-
HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in SMIC 65/55SP
- HDMI version 1.4 compliant transmitter
- Supports DTV from 480i to 1080i/p HD resolution
- Supports 24bit, 30bit and 36bit color depth per pixel
- Integrated cable terminator
-
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 40LL
- HDMI version 1.4 compliant transmitter
- Supports DTV from 480i to 1080i/p HD resolution
- Supports 24bit, 30bit and 36bit color depth per pixel
- Integrated cable terminator
-
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55SP
- HDMI version 1.4 compliant transmitter
- Supports DTV from 480i to 1080i/p HD resolution
- Supports 24bit, 30bit and 36bit color depth per pixel
- Integrated cable terminator
-
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55G
- HDMI version 1.4 compliant transmitter
- Supports DTV from 480i to 1080i/p HD resolution
- Supports 24bit, 30bit and 36bit color depth per pixel
- Integrated cable terminator
-
USB 3.0 PHY
- Standard PHY interface (PIPE) enables multiple IP sources for USB 3.0 Link Layer
- Supports 5.0 GT=s serial data transmission rate
- Supports 16- or 32-bit parallel interface
- Supports PCLK as PHY output
-
MIPI M-PHY in SMIC 90LL
- Supports MIPI Standard for M-PHY v3.0.
- Dual-simplex point-to-point interface with ultra low voltage differential signaling
-
MIPI M-PHY in SMIC 130nm
- Complies with MIPI Standard for M-PHY v3.0
- Slew-rate control for EMI reduction
- Supports HS modes GEAR 1-3
