Memory Controller & PHY IP for TSMC

Compare 28 Memory Controller & PHY IP for TSMC from 7 vendors (1 - 10)

ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm
- Page Size – 2KB, 4KB, 8KB, 16KB
- Bank/chip select options
- Programmable timing
ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 28nm
- Page Size – 2KB, 4KB, 8KB, 16KB
- Bank/chip select options
- Programmable timing
ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 12nm
- Page Size – 2KB, 4KB, 8KB, 16KB
- Bank/chip select options
Secure Digital I/O offerings
- Secure Digital
- Physical Features
1.8V/3.3V Switchable GPIO With 5V I2C Open Drain & Analog in 16/12nm
- Multi-voltage 1.8V / 3.3V switchable operation
- 4 selectable drive strengths (25-235MHz @1.8V, 10pF)
- Full-speed output enable
- Independent power sequencing
M31 eMMC/SDIO at TSMC 28HPC+ Process
- Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
- Consisting of driver, receiver & pull-up/down resistors
- Power-sequence free
- Provides multi-driving-strength selection
M31 eMMC/SDIO at TSMC 22ULP Process
- Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
- Consisting of driver, receiver & pull-up/down resistors
- Power-sequence free
- Provides multi-driving-strength selection
M31 eMMC/SDIO at TSMC 22ULL Process
- Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
- Consisting of driver, receiver & pull-up/down resistors
- Power-sequence free
- Provides multi-driving-strength selection
ONFi PHY 4.0 (FPHY+MDLL+SDLL Regulator) (Silicon Proven in TSMC 28HPC+)
- Support ONFi 4.0 IO Electrical Specification
- Support Legacy up to 50MHz
- Support NV-DDR2 with operating frequency up to 533Mbps
- Support NV-DDR3 with operating frequency up to 800Mbps
ONFI 4.1 PHY IP (Silicon Proven in TSMC 12FFC)
- Support ONFi 4.1 IO Electrical Specification
- Support Legacy up to 50MHz
- Support NV-DDR2 up to 533Mbps
- Support NV-DDR3 up to 1200Mbps