PLL IP for TSMC
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PLL IP
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113
PLL IP
for TSMC
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- 28nm
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Analog-PLL For Spread Spectrum Clock
- TSMC 28nm HPM/HPC
- Including Loop-filter
- VCO operating range : 900MHz - 1800 MHz
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Analog PLL For Frequency Multiplying
- Including Loop-filter
- VCO operating range : 2500MHz - 5000 MHz
- Output frequency range : 1250MHz - 2500 MHz
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Analog-PLL For Frequency Multiplying
- Process: TSMC 28nm HPM/HPC
- Available metalization technologies: 4X2Y2R and 5X2Y2R
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High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
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Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
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General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
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Fractional-N PLLs for Performance Computing
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
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General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- Output frequency range: 500MHz – 2GHz
- Loop bandwidth 60kHz – 180MHz
- 8 or 4 phase output clocks
- Output clock duty cycle 50 +5%
- Typically locks within 150 reference clock cycles
- Simple power-up sequence
- Lock indicator signal
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14GHz Integer-N High-Speed PLL
- Type II hybrid Integer-N LC-PLL
- Quadrature clocks at 14GHz and 7GHz
- Fast locking
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Fully Digital Glitch Free PLL TSMC HPC+28nm - 200-2000 MHz
- Ideal as a clock generator for digital design
- Excellent frequency jitter performance
- Ultra-low area fully digital PLL design