Die to Die IP for SMIC

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Compare 6 Die to Die IP for SMIC from 2 vendors (1 - 6)
  • Die-2-die interfaces for chiplets
    • Analog I/Os
    • ESD Power protection
    • Ground pads
  • INNOLINK-C Controller
    • General Features
    • DFI Features
  • INNOLINK-C PHY
    • LPDDR5 like interface with IO voltage 0.4V and core power supply 0.9V
    • 12Gbps for maximum IO speed in HLMC 28nm process
    • Default 64-bit DQ Tx+ 64-bit DQ Rx per module, module number can be 1/2/4/8/16 or more
    • Burst data, forward clock, no CDR
  • INNOLINK-B Controller
    • General Features
    • DFI Features
  • INNOLINK Chiplet PHY&Controller
    • Innolink-A
    • Meets the performance, efficiency and reliability requirements of B2B/C2C interconnects
    • Already silicon proven
    • Delivers 56Gbps/pair with -36dB insertion loss
  • INNOLINK-B PHY
    • Support both Die2Die and Chip2Chip application
    • GDDR6 like interface with IO voltage is core power supply (0.8V for TSMC 12nm)
    • 24Gbps for maximum IO speed
    • Default 16bit DQ Tx+ 16bit DQ Rx per module, module number can be 1/2/4/8/16 or more
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Semiconductor IP