UART with APB Interface
Overview
CoreUART_APB is a serial communications interface that is intended primarily for use in embedded systems. The controller can operate in either an asynchronous (UART) or synchronous mode. In the asynchronous mode, CoreUART_APB can be used to directly interface to industry standard UARTs. CoreUART_APB has an is an APB-wrapper that adds an APB interface allowing the core to be connected to the APB bus and controlled by an APB bus master.
Key Features
- Support of fractional baud value for greater precision
- Size efficient UART with FIFO interface
- Fully programmable baud rate with glitch rejection
- Support normal and FIFO modes
- Support asynchronous operation
- Optional smaller and higher-performance synchronous mode for use in embedded systems
- 7 or 8 Bits of data
- Parity (odd, even, none)
- FIFO Depth up to 256 bytes
- Double-buffered to maximize throughput in normal mode (non-FIFO)
- Supports RS232 interface